FPGA / DSP/ Wireless Technology

Cyclone III Video Kits

Cyclone III Video Development Kit

Altera EP3C120F780 Development board
HSMC Quad Video daughter card
8 composite or 4 s-video inputs
1 HD (1080p) DVI Output port or
1 TV (PAL/NTSC) output with resolutions to 1024×768 and support for composite, s-video or SCART (RGB) outputs
HSMC DVI daughter card
1 HD (1080p) DVI Output port (HDMI with external adaptor)
1 HD (1080p) DVI Input port (HDMI with external adaptor)
Interfaces directly to the Altera Video and Image Processing (VIP) Suit
Collection of video reference designs

Altera’s Cyclone III device is an ideal video processing platform given the large number of multipliers, low power and M9K memory blocks.

HSMC Broadcast Video Board

Dual ASI/SD-SDI transmitter/receiver
Adaptive cable equalizers
Multi-rate cable drivers
27 Mhz VCXO
200Mhz Quadrature Modulating 14-bit DAC
Optional Secure Key

The BVDC is designed for professional video equipment developers. The dual ASI/SD-SDI interfaces allows FPGA designs access to industry standard video transport signals. Based on the latest adaptive cable equalizers and drivers, the ASI/SDI interfaces produces excellent noise immunity up to cable lengths of 350m. A VCXO allows precise synchronisation to incoming ASI signals. Card is shipped with source code examples.

A Quadrature Digital Up-converter is also included on the BVDC board. Based on the Analog AD9857 14-bit DAC, the DUC circuit allows flexible modulation schemes such as those used for DVB-T and DVB-C etcThe DAC output incorporates an anti-alias filter and can drive in single-ended or differential mode.



Digital Visual Interface Compliant (DVI 1.0)
Supports resolutions from VGA to UXGA (1600×1200 and 1920×1080 [1080p@60])
25 – 165 Mhz Pixel rates
EDID data reading/writing
Monitor detection through Hot-Plug

The HSMC DVI interface card is designed to allow developers access to high-quality, high resolution video signals in their FPGA designs. It integrates both a DVI receiver and transmitter onto the same card giving the flexibility required by high resolution image processing systems. Card is shipped with source code examples.

The hsmc dvi daughter card also supports a serial eeprom for FPGA design security. Developers can distribute demonstrations of their IP locked to the hsmc bvdc card

DSK-EYE gigabit

5.2 Megapixel Omnivision CMOS sensor
Latest Altera Cyclone II FPGA
High performance gigabit Ethernet interface
Santa Cruz prototyping socket for custom interfaces

Machine vision
Video phone
Remote image sensing
Surveillance systems
Image recognition, filtering and compression
Video streaming
Stand-alone vision systems
Net connected smart camera
VoIP projects

The DSKeye gigabit is a TI DSK daughterboard gathering the latest FPGA technology, a 5.2 mega pixel camera and user configurable interface options to deliver a Smart Camera system for development and research at a fraction of the cost normally associated with such technology. The DSKeye gigabit has evolved over three generations with each stage introducing enhanced flexibility and functionality to meet growing customer demands. Designed around the latest Altera, Cyclone II FPGA, the DSKeye gigabit allows developers complete access to the DSP/Camera interface and even the inclusion of custom FPGA processing functions.

The latest evolution of the DSKeye introduces gigabit Ethernet interfacing. Based on the latest ASIX high-performance 32/16-bit gigabit Ethernet MAC, the DSKeye now permits users to transfer image data using the latest networking technology. A DSP/BIOS optimised port of the popular open source lwIP stack is included with the DSKeye gigabit. This software TCP/IP implementation allows high performance TCP/IP networking using standard Berkley Sockets or alternative low-level access.